Speaker
Description
The COMET experiment at J-PARC aims to search for the neutrinoless transition of a muon to an electron ($\mu$-$e$ conversion). We have developed the readout electronics board called ROESTI for the COMET straw tube tracker. We plan to install the ROESTI near the detector, where the neutron fluence is expected on the order of $10^{12}$ neutron/cm$^2$. Neutron-induced single-event upsets disrupt the correct operation of the FPGA. We developed a novel hybrid scrubber of the Xilinx Soft Error Mitigation (SEM) and Xilinx soft microprocessor (Picoblaze) for the FPGA on the ROESTI.
The hybrid scrubber can correct both single-bit and multi-bit upsets in a frame, even without a reference memory that stores the original configuration data. Single-bit upsets are corrected by the SEM. When multi-bit upsets occur, the FPGA communicates with a DAQ PC via TCP/IP and receives the address of bit upsets. The bits at that address are inverted by the Picoblaze. As a result, the bits return to their original state and the multi-bit upsets are corrected.
The neutron irradiation tests were performed with the FPGA that implemented our hybrid scrubber. A total of 25 multi-bit upsets occurred, and all of them were corrected. This result indicates that the time required for FPGA firmware re-download can be reduced by around 76% compared to a conventional FPGA that implements the SEM only.
In this presentation, we will describe the implementation of the hybrid scrubber in the FPGA and the result of the neutron irradiation test.
| Minioral | Yes |
|---|---|
| IEEE Member | No |
| Are you a student? | No |
