22–26 Apr 2024
Asia/Ho_Chi_Minh timezone
*** See you in Elba, Italy in May 2026 ***

Design of an FPGA-based USB 3.0 controller

25 Apr 2024, 11:55
1h
Poster presentation Front-End Electronics, Fast Digitizers, Fast Transfer Links & Networks Poster B

Speaker

Zhe Ning

Description

The traditional USB 3.0 communication based on FPGA uses an external chip as a USB PHY or a USB controller including a USB PHY. This paper realizes a USB 3.0 controller using FPGA resources, in which FPGA logic realizes a serial interface engine, and an FPGA internal transceiver is a USB PHY. Used slices percent after implementation is ~5% in Kintex-7 325t. The test result shows that the speed of USB 3.0 is more than 320 MB/s bulk-in and bulk-out transfers.

Minioral No
IEEE Member No
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Author

Zhe Ning

Presentation materials