Speaker
Description
The peak luminosity of the Super Tau-Charm Facility (STCF) proposed by the Chinese particle physics community is about an order of magnitude greater than the present Tau-Charm factory. In the STCF, the micro-resistive well ($\mu$RWELL) based inner tracker detector, located closest to the beamline, demands a new high-rate, low-noise, and low power Application Specific Integrated Circuit (ASIC). The first version prototype ASIC integrates 32 readout channels, each consisting of a Charge Sensitive Amplifier (CSA), a Pole-Zero Cancellation (PZC), a shaper, and an output buffer. The supply voltage is designed to be 0.8 V to reduce power consumption while maintaining the same channel thermal noise and transconductance, and the core amplifier of the CSA achieves an open-loop gain of 74.2 dB and a Gain-BandWidth product (GBW) of 1.55 GHz with only 900 $\mu$W power consumption. In addition, a fast recovery circuit is designed to reduce the dead time. This ASIC has been taped out in a 0.18 $\mu$m CMOS process and a series of post-layout simulations have been performed. The dead time for a single channel is less than 250 ns, resulting in a maximum counting rate capability of 4 MHz. The equivalent noise charge (ENC) is 698 e + 23 e/pF while the power consumption is about 2.2 mW per channel, resulting in a figure of merit (FOM) of only 0.31 pJ.
| Minioral | Yes |
|---|---|
| IEEE Member | No |
| Are you a student? | Yes |
