Speaker
Sriprakash Verma
(ITER-India, Institute for Plasma Research)
Description
INDA is responsible for development & delivery of total 9 no. of RF sources for ITER Ion cyclotron Heating & Current Drive (ICH & CD) system [1]. To validate the design an R&D program has been initiated. Each ICH & CD source consist of low power RF section, one medium power solid state amplifier followed by two tuned high power tube (tetrode/diacrode) based amplifiers, high voltage/high current power supplies and control system. A dedicated data acquisition and control system has been developed based on Real Time (RT) PXI controller, where different critical parameters, like frequency, phase, amplitude and anode voltage shall be controlled via feedback control loop.
RT PXI controller is used for Interlock, closed loop control of amplitude and voltage, to transfer user defined parameter from Host to PLC & vice versa and for data acquisition. RT controller and FPGA modules (Field Programmable Gate Array) are communicating with each other through Read/Write control function of LabVIEW. DMA-FIFO is used to transfer data from FPGA to RT controller for data acquisition. Different control parameters are passed to FPGA module (7841R) from RT Controller through Read/Write control function of LabVIEW as well. RT PXI controller and host system are communicating to each other via FTP protocol and shared variables. Interlock logic is running on FPGA to protect high power RF tubes and different subsystems. Two mode of data acquisition function is implemented on NI PXI-8108 RT controller (Embedded RTOS Controller). For logging different signals and status of subsystems normal acquisition at 1ms sampling rate is implemented. For acquiring different events before fault/RF shutdown, trigger based fast data acquisition at 1µs sampling rate is implemented. Queue method has been used for fetching the data from digitizer board and writing in a file created on RT controller. GPS timing board NI PXI 6683H is used to synchronize RT with GPS and same time reference is used for plotting the acquired data. Time stamping method has been used to get the time information for synchronizing different events. To achieve the performance of RF source as required by ITER, amplitude and phase control loop is implemented on FPGA module. Another control look has been implemented to control the anode dissipation of high power tube by varying anode voltage in real time.
In this paper, architecture of RT controller will be discussed in detail and various operational results will be presented.
Author
Sriprakash Verma
(ITER-India, Institute for Plasma Research)
Co-authors
Mrs
Aparajita Mukherjee
(ITER-India,IPR)
Mrs
Dipal soni
(ITER-India,IPR)
Mr
Hriday Patel
(ITER-India,IPR)
Mr
Kumar Rajnish LNU
(ITER-India,IPR)
Mr
Raghuraj Singh
(ITER-India,IPR)
Mr
Rajesh Trivedi
(ITER-India,IPR)
