Speaker
Dr
Jingzhou ZHAO
(IHEP.Beijing)
Description
In the End-cap TOF(ETOF) upgrade of BESIII MRPC(Multi-gap Resistive Plate Chamber) detectors are used. ETOF is designed with 72 MRPCs. 24 channels signal are generated from each MRPC, in which 6 neighbouring channels OR together in Front-End Electronic(FEE) side. So 288 channel hit signals are sent to ETOF trigger system for trigger logic. The MPRC hit signal is about 30 ns width after FEE. Hit signals are stretched and trigger data are stored by TDPP (Trigger Data Pre-Processor) and then sent to ETOFT (End-cap TOF Trigger) through 10 high speed fiber links. Trigger data are aligned and stored in FIFO in ETOFT. Trigger logic running on the center FPGA counts hits signals and Bhabha events and give out ETOF trigger signals, NETOF >=1, NETOF >=2 and Back to Back information. ETOF trigger signals are integrated with other detector trigger signals by SIF2(Signal Integrate and Fanout) to Global Trigger to generate L1 signal. The system has already been installed on BESIII on Sept. 2015 and has run stably for 2 months.
Author
Dr
Jingzhou ZHAO
(IHEP.Beijing)
Co-authors
Ms
Fang DENG
(IHEP.Beijing)
Ms
Jie HUANG
(IHEP.Beijing)
Dr
Ke WANG
(IHEP.Beijing)
Ms
Wenxuan GONG
(IHEP.Beijing)
Prof.
Zhen-An LIU
(IHEP.Beijing)
