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As experimental fusion devices transition from shot-based operation to longer pulse duration, diagnostic and control systems need to evolve to support this kind of operation. This work proposes a distributed data acquisition architecture that aims to provide ultra-low latency communications based on full hardware User Datagram Protocol (UDP) offloading, leveraging the emerging IEEE Time Sensitive Networking (TSN) technologies for deterministic latency and synchronization, and providing an edge computing platform that allows the implementation of Digital Signal Processing (DSP) algorithms and Artificial Intelligence (AI) real-time applications.
The solution proposes the use of the Micro Telecommunications Computing Architecture (MTCA) standard as the foundation and is entirely built from Commercial Off-The-Shelf (COTS) components. The core device is an Advanced Mezzanine Card (AMC) form-factor board based on an AMD Zynq UltraScale+ MPSoC, which enables heterogeneous processing through its integrated ARM processing system and programmable logic. For connectivity, an FPGA Mezzanine Card (FMC) module with dual Small Form-factor Pluggable (SFP+) cages uses the device high-speed transceivers to establish a 10 Gigabit Ethernet (10GbE) fiber optic link, on top of which a UDP offload engine is used to ensure efficient data streaming to external systems.
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