25–29 May 2026
La Biodola - Isola d'Elba (Italy)
Europe/Rome timezone
Reminder: Posters are requested to be uploaded by Thursday, 21 May.

FPGA based RDMA for BEE Readout

28 May 2026, 11:25
1h 5m
Elena Room (Hotel Hermitage)

Elena Room

Hotel Hermitage

Poster presentation Data Acquisition and Trigger Architectures Data Acquisition and Trigger Architectures - PS

Speaker

Chang Xu (IHEP, UCAS)

Description

Traditional TCP/IP protocols rely heavily on CPU processing for tasks such as data packet encapsulation, parsing, and transfer, leading to substantial latency and resource consumption. In contrast, Remote Direct Memory Access (RDMA) enables direct data transfer between the network adapter and memory, bypassing the operating system kernel. This approach significantly reduces CPU overhead while delivering high bandwidth and ultra low latency, making it an efficient solution for high performance and data intensive applications.

This paper presents the design and implementation of an FPGA based RDMA protocol stack for the BEE readout system of the Circular Electron Positron Collider (CEPC). The implementation leverages the RoCEv2 protocol over standard Ethernet, utilizing the CMAC IP core for link and physical layer processing, a custom designed RDMA core for protocol operations, and DDR for data buffering. By enabling kernel-bypass and zero-copy communication, the system can substantially lower both communication overhead and latency in the CEPC BEE-to-DAQ data link, thereby supporting the deployment of advanced software-based high-level triggers (HLTs) under extreme event rates.

Minioral Yes
IEEE Member No
Are you a student? Yes

Authors

Chang Xu (IHEP, UCAS) Sheng Dong (Institute of High Energy Physics (IHEP), Chinese Academy of Sciences) Hongyu Zhang

Presentation materials

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