25–29 May 2026
La Biodola - Isola d'Elba (Italy)
Europe/Rome timezone
Reminder: Posters are requested to be uploaded by Thursday, 21 May.

GAROP3: A Gated Readout ASIC for the Proton Beam Monitor of the COMET Experiment

25 May 2026, 14:45
1h
Elena Room (Hotel Hermitage)

Elena Room

Hotel Hermitage

Poster presentation Front-End Electronics, Fast Digitizers, Fast Transfer Links & Networks Front-End Electronics, Fast Digitizers, Fast Transfer Links & Networks - PS

Speaker

Mr Xiang-Yu Xu (KEK)

Description

The COMET (Coherent Muon to Electron Transition) experiment at J-PARC searches for neutrino-less $\mu-e$ conversion, requiring a SiC sensor in the beam pipe as a proton monitor to serve as a veto between proton pulses.
The GAROP (GAted-ReadOut Proton) ASIC has been developed as the dedicated front-end readout for the SiC sensor that can be gated off with a repetition period of $1.2\ \mu s$ to withstand the extreme radiation of J-PARC proton beam.
Fabricated in 65nm CMOS process, the chip features eight channels that are grouped into two flavours differing in shaper topology for performance comparison.
Each channel comprises a CSA (Charge Sensitive Amplifier), a CR-RC shaper, and a comparator.
To prevent saturation during the main proton pulse, the circuit employs a gating topology with three switches: one for CSA bypassing ($SW_{CSA}$), one for shaper input isolation ($SW_{CRRC}$), and one for shaper baseline holding ($SW_{BSLN}$) for saturation prevention and fast recovery.
The recently-submitted version, namely GAROP3, features decoupled gating inputs for the three switches, which allows for the independent adjustment of delay times and switching sequences to achieve the optimal gating setup with the minimum waveform distortion.
Additionally, each channel is equipped with an auto-tuning threshold circuit to compensate for process-induced baseline variations by adjusting the threshold according to the results of the comparator.
The GAROP3 has been submitted for fabrication. Validation results demonstrating the chip's functionality to handle the input signal with or without gating, as well as threshold tuning, will be presented.

Minioral Yes
IEEE Member Yes
Are you a student? Yes

Author

Mr Xiang-Yu Xu (KEK)

Co-authors

Prof. Tetsuichi Kishishita (University of Bonn) Mr Kazuya Tauchi (KEK) Mr Yowichi Fujita (KEK) Prof. Yoshinori Fukao (KEK) Prof. Hajime Nishiguchi (KEK) Prof. Masaya Miyahara (KEK)

Presentation materials

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