Speaker
Description
BESIII (Beijing Spectrometer III) is a large general-purpose detector operating at BEPCII (Beijing Electron–Positron Collider II). Since 2009, it has operated stably and delivered many representative physics results. In BESIII experiment, MDC (Main Drift Chamber) not only provides charged-particle tracking information, but also supplies key inputs to the Level-1 (L1) trigger.
Trigger algorithms in the MDC sub-trigger system are optimized during the design stage using simulation and are then kept stable for long-term running. Meanwhile, the DAQ readout of detector raw data strongly relies on the Level-1 Accept (L1A) signal generated by the trigger system. Under this architecture, the input information and intermediate data during the trigger process are difficult to systematically acquire, which has limited offline cross-check and iterative improvement of the trigger algorithms based on real running inputs, and therefore constrains further studies on trigger algorithms.
To address this need, we have developed a new generation of trigger electronics based on AMD Kintex UltraScale FPGAs, providing enhanced data transmission, buffering, and processing capabilities, together with an additional full-readout path for trigger data. We also design a dedicated readout frame format for trigger data readout and investigate transport solutions like RDMA (Remote Direct Memory Access). The upgraded hardware and firmware remain compatible with the existing system and don’t affect the critical trigger path.
This work explores a practical approach to introduce full readout of trigger data through hardware upgrades, providing a feasible hardware basis for future trigger-strategy studies.
| Minioral | Yes |
|---|---|
| IEEE Member | No |
| Are you a student? | Yes |