Speaker
Mr
Xu Wang
(Univ. of Sci.&Tech. of CHN(USTC))
Description
The ATLAS experiment at the CERN Large Hadron Collider (LHC) will be upgrading its Muon Spectrometer during LHC phase-I upgrade in around 2019 to benefit from high luminosity and high energy runs at the LHC. The upgrade will replace the innermost station (namely Small Wheel) of the Muon Spectrometer in the forward region with the so-called New Small Wheel (NSW), in order to improve its Level-1 trigger in the high background rate environment. The NSW employs two types of high rate capable gaseous detectors, namely MicroMesh Gaseous Structure (Micromegas) and small-strip Thin Gap Chamber (sTGC), for on-line reconstruction of muon segments with pointing accuracies of 1 mrad. sTGCs, primary trigger detectors similar to those Thin Gap Chambers instrumented in the present ATLAS Muon Spectrometer but with fine-pitch readout strips, will utilize about 400k readout channels to discriminate bunch crossing in 25 ns and determine hit positions with a precision of about 100 μm per detector layer. Stringent requirements on the timing and spatial measurement precisions, large number of readout channels all impose significant challenges to the design of the readout electronics system. The readout front-end boards under development for the sTGC detector will carry four to eight 64-channel sophisticated amplifier and digitization ASICs, four trigger data processing ASICs as well as readout and slow control chips while it’s physical size is limited to 14cm * 6.5cm in order to be installed on the chamber. These boards are expected to carry hundreds of channels of sensitive analog signals as well as high speed serial lines with speeds up to 4.8 Gbps to shift out trigger data off detectors. Large amount of data to be processed on detector and moved out in both trigger and precision readout paths with low latency requirement are of big concern. We will present the development of the first prototype of the front-end board for the sTGC detector, readout scheme and firmware for the mini data acquisition system that has been used to characterize the amplifier and digitation ASIC as well as for integration test with a prototype detector. Results from the front-end board and the prototype detector integration with the cosmic ray as well as plans to develop a full data rate acquisition system to verify the front-end electronics design will be discussed.
Author
Mr
Xu Wang
(Univ. of Sci.&Tech. of CHN(USTC))
Co-authors
Ms
Geng Tianru
(Univ. of Sci & Tech. of CHN (USTC))
Prof.
Han Liang
(Univ. of Sci. and Tech. of CHN(USTC))
Prof.
Jin Ge
(Univ. of Sci. &Tech. of CHN(USTC))
Dr
Kun Hu
(University of Science and Technology of China)
Dr
Li Feng
(Univ. of Sci.&Tech. of CHN)
Mr
Lu Houbing
(Univ. of Sci. &Tech. of CHN(USTC))
Ms
Wang Xinxin
(Univ. of Sci. & Tech. of CHN (USTC))
Mr
Yang Hang
(Univ. of Sci. & Tech. of CHN (USTC))