Speaker
Mr
Harald Kleines
(Forschungszentrum Juelich)
Description
The Micro Vertex Detector (MVD) will be used as the central tracking detector in the PANDA (AntiProton Annihilation at Darmstadt) detector system which is under development for the future accelerator facility FAIR in Darmstadt, Germany. The design of the MVD is based on silicon strip detectors at the outer layer and on silicon pixel detectors at the inner layers. Data from the readout ASICs in the front end will be sent via GBT opical links to a multiplexing layer aggregating them to 10 Gbit/s optical uplinks to the Level-1 Trigger network. The multiplexing layer will be based on MTCA.4 using the HGF-AMC, a versatile MTCA.4 module developed by DESY in cooperation with KIT. In order to extend the multiplexing capabilities of the HGF-AMC, a Rear Transition Module (RTM) with 8 optical links has been designed.
Author
Mr
Harald Kleines
(Forschungszentrum Juelich)
Co-authors
Mr
Axel Ackens
(Forschungszentrum Juelich)
Dr
Matthias Drochner
(FZJ)
Mr
Michael Ramm
(Forschungszentrum Juelich)
Dr
Peter Wuestner
(Forschungszentrum Juelich)
Prof.
Stefan van Waasen
(Forschungszentrum Juelich)
