Speaker
Gilles De Lentdecker
(Universite Libre de Bruxelles (BE))
Description
In this contribution we will report on the progress of the design of the electronic readout and data acquisition system being developed for triple-GEM detectors which will be installed in the forward region (1.5 < |η| < 2.2) of the CMS muon spectrometer during the 2nd long shutdown of the LHC, planed for the period 2018-2019. The architecture of the triple-GEM readout system is based on the use of the micro-TCA standard hosting FPGA-based Advanced Mezzanine Board and of the Versatile Link with the GBT chipset to link the front-end electronics to the micro-TCA boards. For the on-detector electronics a new front-end ASIC, called VFAT3, is being developed for the CMS triple-GEM system. Its architecture is based on the TOTEM VFAT2 chip which is currently used to test the CMS triple-GEM prototypes and the new data acquisition system. On detector an FPGA mezzanine board, called the opto-hybrid, has to collect the data from the VFAT3 chip to transmit them optically to the micro-TCA boards using the GBT protocol. In this contribution we will describe the hardware architecture and expected performance, report on the status of the developments of the various electronic components and present preliminary results obtained with readout system prototypes at beam tests.
Author
Gilles De Lentdecker
(Universite Libre de Bruxelles (BE))
