Speaker
Description
The main drift chamber (MDC) is a crucial component of large colliders. As a track detector, it requires excellent position resolution, which depends on high-precision charge and time measurements provided by the readout electronics. With the increase in the collider's center-of-mass luminosity, the counting rate of its main drift chamber also rises. Existing readout electronics systems for main drift chambers cannot address issues such as complex multi-peak structures, significant waveform inconsistencies, and waveform pile-up caused by prolonged signal duration under high counting rates. In this study, a prototype readout electronics system for high counting rate main drift chambers was designed. First, a simulation of the waveform detected by the high counting rate main drift chamber was conducted. Based on the features of the simulation waveforms, the front-end readout module (FEM) was designed. The FEM employs a transimpedance amplifier (TIA) to achieve distortion-free amplification of small signals. The data acquisition module (DAM) utilizes an analog-to-digital converter (ADC) and a field-programmable gate array (FPGA) to digitize the waveforms. It can digitize the multi-channel signals from the FEM, simultaneously perform charge and time measurements, and thereby calculate the dE/dx ,which is the energy loss information, enabling track detection. Test results from high-counting-rate MDC waveform simulation tests and joint detector tests show that within the dynamic range of 60–1800 fC, the system delivers a charge resolution better than 8 fC and a time resolution better than 1 ns, meeting the requirements for high-counting-rate main drift chambers.
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