Speaker
Description
In accelerator facilities, hundreds of devices are distributed over large areas. To ensure synchronous operation of all components, a high-precision clock distribution and synchronization system is required. However, due to the use of specific clock frequencies and the increasingly stringent synchronization accuracy requirements of modern accelerator systems, conventional approaches based on the standard White Rabbit technique are no longer sufficient. This work presents a high-precision, frequency-adaptive clock distribution and synchronization system based on high-speed transceivers and an improved Direct Digital Synthesis (DDS) technique implemented on a high-performance FPGA. By exploiting the precise delay adjustment capability of the FPGA high-speed transceivers and employing transceiver delay fixing techniques, high-precision reference clock distribution and synchronization are achieved. In addition, a high-resolution FPGA Time-to-Digital Converter (TDC) is used to extract the frequency and phase information of the input signal in a fully digital manner, eliminating the need for complex analog circuit at the master node. In conjunction with waveform recovery at the slave nodes, self-adaptive, high-precision distribution and synchronization of arbitrary-frequency clocks are realized. Test results show that the proposed system achieves a synchronization accuracy better than 15 ps for specific-frequency clock distribution. Over a temperature variation of 50 °C, the phase variation between nodes remains within 20 ps, while reliable data and commands transmission are also achieved.
| Minioral | Yes |
|---|---|
| IEEE Member | No |
| Are you a student? | No |