25–29 May 2026
La Biodola - Isola d'Elba (Italy)
Europe/Rome timezone
NB: The submission deadline for the Student Paper Awards is Monday, 11 May.

135 FPGA-Based Deep Learning Acceleration for Real-Time $z$-Vertex Reconstruction in STCF L1 Trigger

28 May 2026, 10:42
2m
Maria Luisa Room (Hotel Hermitage)

Maria Luisa Room

Hotel Hermitage

Mini Oral Data Acquisition and Trigger Architectures Mini Orals

Speaker

Shuangshuang Zhang (Shandong University)

Description

The Super Tau-Charm Facility (STCF) experiment will operate at high instantaneous luminosity, placing stringent requirements on the real-time performance of its L1 trigger system. Fast and reliable reconstruction of the primary vertex position along the beam axis z is essential for effective background suppression and early event selection under fixed latency constraints.
We present a deep neural network for real-time z-vertex reconstruction designed for deployment in the STCF L1 trigger. The network operates on high-level features extracted from track segments reconstructed in the central drift chamber. For each track candidate, information from eight super-layers is used, including the local track angle, relative azimuthal angle, and drift time. A lightweight attention mechanism is applied to dynamically reweight contributions from different detector layers, followed by one-dimensional convolutional and fully connected layers to exploit geometric correlations while maintaining hardware efficiency.
The proposed models are trained using simulated STCF events and evaluated against offline reference vertices. A z-vertex resolution of approximately 5 cm is achieved, which is sufficient for trigger-level discrimination and remains stable across the studied kinematic range. The networks are optimized and implemented on FPGA using the hls4ml framework with quantization-aware training, enabling fixed-latency and fully pipelined inference.
A systematic design space exploration is performed to study the trade-offs between vertex resolution, inference latency, and FPGA resource utilization. The results demonstrate that the proposed architectures satisfy L1 trigger latency constraints while offering flexibility for further optimization. This work highlights the feasibility and potential of deep learning–based vertex reconstruction in real-time trigger systems.

Minioral No
IEEE Member No
Are you a student? Yes

Authors

Qidong Zhou (Institute of Advanced Research (IAR) / Kobayashi-Maskawa Institute (KMI), Nagoya University) Shuangshuang Zhang (Shandong University) zhao-zhi Liu

Presentation materials

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