Speaker
Description
The next generation of high-luminosity collider experiments, such as the HL-LHC and CEPC, will generate data streams at terabyte-per-second, imposing extreme real-time processing demands on trigger and data acquisition (TDAQ) systems. Online track reconstruction is pivotal for effective data reduction, transitioning TDAQ from simple filtering to precision selection. Graph Neural Networks (GNNs) have emerged as a powerful, data-driven solution for this task due to their natural alignment with particle track data structures. However, deploying GNNs in online systems requires stringent adherence to latency, throughput, and power constraints, which necessitates dedicated hardware acceleration beyond the limitations of CPUs and GPUs. This paper proposes and demonstrates a comprehensive hardware-software co-design approach, implementing a complete real-time GNN-based track-finding pipeline on the AMD Versal ACAP. Our methodology maps the algorithm onto the Versal VCK190's heterogeneous architecture. The graph construction phase, utilizing an ε-nn algorithm, is implemented in the PL incorporating an LUT to accelerate neighborhood searches. The core denoising GNN model is parallelized and deployed onto the AIE array, employing a carefully designed dataflow and memory-conscious partitioning strategy to balance computational parallelism with the inherent resource constraints of individual AIE tiles. Implementation results show a GNN latency that scales linearly with input size, measured at approximately 1.086 ms for 100 nodes while consuming 21.75% of the AIE array. Functional validation on a hardware testbed confirms the system's operational correctness. This work substantiates the feasibility of leveraging Versal ACAP's heterogeneous compute paradigm to meet the rigorous real-time processing challenges of next-generation high-energy physics experiments.
| Minioral | No |
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| IEEE Member | No |
| Are you a student? | Yes |