Speaker
Description
The BESIII experiment, operating at the Beijing Electron–Positron Collider II (BEPCII), has delivered a broad range of significant physics results in the tau–charm energy region. The BESIII trigger system comprises fast event selection and a Fast Control System (FCS). As the central control infrastructure, the FCS integrates trigger timing, control logic, and interface modules. It consists of the Clock Fan-out Board (CLKF), Fast Control Board (FCTL), Fast Control Daughter Board (FCDB), Fast Control Signal Fan-out Board (FCSF), and Trigger Readout Control Board (TROC). Having been in stable operation for over 16 years, the original FCS was built on legacy hardware platforms and firmware toolchains that now face aging and scalability limitations. To address these challenges, this work presents a comprehensive upgrade of the FCS across hardware, firmware, and software. A new FCTL based on the AMD Kintex UltraScale FPGA and an updated CLKF have been developed, together with a firmware architecture upgrade of FCTL. The upgraded firmware maintains all legacy functionalities while introducing network-based data readout via the SiTCP protocol. Furthermore, EPICS-based software was developed to monitor SiTCP data, improving system integration and real-time control. Laboratory tests verify that the hardware, firmware, and software designs meet all performance requirements. The system is prepared for on-site deployment and subsequent operation within the BESIII experiment.
| Minioral | Yes |
|---|---|
| IEEE Member | No |
| Are you a student? | Yes |