25–29 May 2026
La Biodola - Isola d'Elba (Italy)
Europe/Rome timezone
NB: The submission deadline for the Student Paper Awards is Monday, 11 May.

Real-Time FPGA-Based SiPM Detector Emulation using Temporally Quantized Model

27 May 2026, 09:30
20m
Maria Luisa Room (Hotel Hermitage)

Maria Luisa Room

Hotel Hermitage

Oral presentation Industry and Industry collaboration Emerging Technologies, New Standards, Feedback on Experience & Industry

Speaker

Stefano Carsi (Nuclear Instruments, Lambrugo (Co), Italy)

Description

We present a real-time hardware implementation of a versatile detector emulator capable of reproducing realistic Silicon Photomultiplier (SiPM) signals. Our approach builds upon the open-source SimSiPM framework originally developed to simulate the microscopic response of SiPMs, including photon detection efficiency, optical crosstalk, afterpulsing, and dark counts. SimSiPM provides idealized photon-level data with arbitrary temporal and amplitude resolution. In contrast, our FPGA-based emulator translates this fine-grained simulation into physically realizable analog signals, maintaining real-time operation and finite hardware resolution.
The system receives simulated photon events either via a 10 GbE UDP stream or directly from the Zynq Processing System (PS), and performs on-FPGA temporal quantization, dividing time into bins equal to one clock cycle. All photon hits within a bin are accumulated, and their contribution is combined through a weighted temporal averaging scheme that preserves sub-bin precision. Signal shaping is executed entirely in hardware, using a digital low-pass filter to emulate the finite rise time and a digital RC network for exponential decay synthesis. The resulting waveform is converted to analog through dual 16-bit LTC2000 DACs operating at 2.5 GHz.
This architecture enables the generation of physically accurate detector signals in real time, rather than precomputed waveforms. It also generalizes beyond SiPMs, providing a flexible framework for hardware-in-the-loop testing of front-end electronics. Moreover, when coupled with Geant4 simulations, the system can directly transform particle-level interactions into analog detector outputs. The proposed implementation demonstrates high throughput, low latency, and minimal CPU overhead, achieving real-time emulation of detector behavior on FPGA.

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IEEE Member No
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Authors

Mr Edoardo Proserpio (Nuclear Instruments, Lambrugo (Co), Italy) Stefano Carsi (Nuclear Instruments, Lambrugo (Co), Italy)

Co-authors

Andrea Abba (Gran Sasso Science Institute (IT)) Francesco Caponio (Nuclear Instruments) Dr Valentina Arosio (Nuclear Instruments, Lambrugo (Co), Italy)

Presentation materials

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