Speaker
Description
SliT is the new silicon-strip readout chip for the measurement of the muon anomalous magnetic moment $(g-2)$ and electric dipole moment (EDM) at J-PARC. The readout chip is required to tolerate a high hit rate of 1.4 MHz per strip and to have deep memory for the period of 40 $\mu$s with 5 ns time resolution. To satisfy the experimental requirements, we have developed a series of readout chip with the Silterra 180 nm CMOS technology.
In our previous study, we confirmed the prototype chip SliT128C satisfied all requirements of the J-PARC muon $g-2$/EDM experiment. We made minor revisions in ASIC design and mass production of the SliT128D was carried out. More than 15,000 chips, which is about three times the required amount, were fabricated and performance of a chip has been tested in the laboratory. The test results show a time walk of $0.58 \pm 0.17$ ns between 0.5 and 3 MIP signals. The equivalent noise charge is $1623 \pm 134~e^{-}$ (rms) at $C_{\rm det} =33$ pF as a strip-sensor capacitance. These results are comparable with the result of the SliT128C and meet the experimental requirements. We also observed an improvement from the SliT128C by the minor revision of the ASIC design; the time walk effect on the large injected charge can be reduced. We will report the design details of the SliT128D and its performance.
| Minioral | Yes |
|---|---|
| IEEE Member | No |
| Are you a student? | No |
