Speaker
Mr
Himanshu Tyagi
(ITER-India,IPR)
Description
The Indian Test Facility (INTF) is a negative Hydrogen ion based 100kV, 60A, 5Hz modulated NBI system having 3s ON/20sOFF duty cycle. Prime objective of the facility is to characterize ITER Diagnostic Neutral Beam (DNB) with full specifications, prior to shipment and installation in ITER.
The automated and safe operation of the system will require a reliable and rugged instrumentation and Control system which provide control, data acquisition (DAQ), safety and interlock functions, referred as INTF-DACS. The INTF-DACS has been designed based on the ITER CODAC architecture and ITER-PCDH (plant control design handbook) guidelines with the aim of developing the technical understanding of CODAC framework to be utilized for development of plant system Instrumentation &Control for DNB. The hardware has been selected from the ITER slow and fast controller catalog. For high speed diagnostics, non NI high speed digitizers have been selected. In the area of software, CODAC core software for control application and NI-Labview for the DAQ application have been finalized. There are around 300 no of control and 500 no of acquisition channels consisting of thermal, optical, current and voltage measurements.
The DACS has the mandate to operate INTF for pulse lengths up to 3600 sec by integrating 11 different plant systems; which includes the power supply plant system under a separate controller. The corresponding development possesses many technical challenges. The estimated file size of a single experimental pulse is in GBs for which ITER suggested HDF5 format is selected. The timing distribution is another challenge due to the different resolutions required in fast controller, slow controller and high speed diagnostics in a distributed area. Long pulse data acquisition and monitoring is another challenge. Data exchange across the software platforms, based on EPICS and Labview, is also required for integration. Presently the control and data acquisition hardware has been integrated and the development phase has been initiated on actual hardware platforms.
This paper describes the various developmental activities undertaken to solve the technical challenges in above areas and integration of various components of the DACS towards realizing the full fledged functional INTF DACS.
Author
Mr
Himanshu Tyagi
(ITER-India,IPR)
Co-author
Mr
Jignesh Soni
(IPR)
