CPAD 2025 at Penn

Possible new iterations of the VMM chip for MPGD readout

9 Oct 2025, 11:20

20m

Inn at Penn, University of Pennsylvania

Parallel session talk RDC 4 Readout & ASICs RDC 4 Readout & ASICs

Speaker

Dr Gianluigi De Geronimo (University of Michigan, Stony Brook University, dgcircuits.com)

Description

The JLab SoLID experiment is assessing the VMM ASIC family for GEM tracker readout in high-rate environments. The current VMM3a falls short of requirements. We propose a VMM3b revision with optimized gain and shaping time for high-rate GEM and uRWell operation. Additionally, we are considering a VMM4 version, migrating to TSMC 65nm, with redesigned ADCs, digital core, and new features to serve broader MPGD community applications.