23rd Virtual IEEE Real Time Conference

Session

Poster Session - D

4 Aug 2022, 13:25

Presentation materials

RT2022-Thursday-PosterD.pdf

35. The Design of Low-Jitter Delay-Locked Loop for Ultra High-Resolution Time Measurement

FENG, Miaohui (Northwestern Polytechnical University)

Front End Electronics and Fast Digitizers

Poster presentation

This work is the demand for the fixed and low-jitter delay generation circuit in the time measurement system. As the timing resolution required by modern electronic products constantly improve, the multi-phase clock sampler and the vernier delay line have become frequently-used structures of the ultra-high-resolution time-to-digital converter (TDC), which are both implemented with the fix...

3. USB 3.0 realization based on FPGA

NING, Zhe

Poster presentation

USB are wildly used in FPGA boards, and in the most cases a USB chip such as Cypress CY3014 are used for transfering or an external USB 3.0 PHY is used coupled with USB controllers realized by software running on arm. The paper presents a new USB realizaton based on FPGA fabrics for everything including controllers and PHY. The result shows that the nealy 320 MBps for downstream and upsreame...