26th Australian Institute of Physics Congress and the Australian and New Zealand Conference on Optics and Photonics

Session

AIP QST: Quantum LDPC codes & fault-tolerant architectures

QST

7 Dec 2026, 14:00

Belinda Hutchinson Building (The University of Sydney )

128. Vine Codes: Low-Overhead Quantum LDPC Codes on a Planar Square Grid

Georgia Nixon (University of Sydney)

07/12/2026, 14:00

AIP | Quantum Science and Technology (QST)

Contributed Oral

The surface code is a promising route towards large-scale quantum computing, requiring only nearest-neighbour gates amenable to superconducting hardware. However, surface codes incur large qubit overheads. Novel quantum low-density parity check (qLDPC) codes promise to reduce overheads but require long-range connections that are difficult to achieve on superconducting platforms. Here, we...

713. Generating Large-Distance LP-QLDPC Codes via Randomized Parameter Selection

Menglong Fang

07/12/2026, 14:15

AIP | Quantum Science and Technology (QST)

Contributed Oral

Quantum error correction promises a practical pathway to fault-tolerant quantum computing; however, typical error-correcting codes, such as the surface code, suffer from asymptotically vanishing code rates and high resource overheads. Quantum low-density parity-check (QLDPC) codes have emerged as promising candidates to overcome these limitations. However, designing high-performance QLDPC...

236. Explicit Instances of Quantum Tanner Codes

Rebecca Radebold (University of Sydney)

07/12/2026, 14:30

AIP | Quantum Science and Technology (QST)

Contributed Oral

Quantum computers have the potential to deliver extraordinary computational power by harnessing unique quantum phenomena such as superposition and entanglement. However, quantum systems are very susceptible to noise, and scalable quantum computers will likely require mechanisms to systematically and reliably detect and correct errors during computations. To tackle this bottleneck, a wide...

611. Efficient Implementation of Quantum LDPC Codes on Hardware-Realistic Lattice Architectures

Dr Sina Gholizadeh (University of Technology Sydney)

07/12/2026, 14:45

AIP | Quantum Science and Technology (QST)

Contributed Oral

We present new methods for efficiently implementing quantum low-density parity-check (qLDPC) codes on hardware-constrained two-dimensional architectures. Our focus is on square-lattice devices with nearest-neighbour connectivity, motivated by physically realistic superconducting and silicon-based quantum processors. While qLDPC codes promise improved asymptotic performance compared with...

784. A realistic simulation and application of Bivariate Bicycle codes in ion traps

Anthony O'Rourke (University of Technology Sydney)

07/12/2026, 15:00

AIP | Quantum Science and Technology (QST)

Contributed Oral

Quantum computers will require quantum error-correcting codes. Bivariate Bicycle (BB) codes, a family of qLDPC codes, provide higher encoding rates than planar alternatives such as the surface code. This comes at the cost of requiring some long-range (beyond nearest-neighbour) qubit connections.
Current simulations of BB codes assume long-range connections are equally as costly as...

616. Low-overhead fault-tolerant quantum computation by gauging logical operators

Dominic Williamson (The University of Sydney)

07/12/2026, 15:15

AIP | Quantum Science and Technology (QST)

Contributed Oral

Quantum computation must be performed in a fault-tolerant manner to be useful in practice. Recent progress has established quantum error-correcting codes with sparse connectivity requirements and constant qubit overhead suitable for quantum memory. However, existing schemes that include fault-tolerant logical measurement on such quantum memories do not always achieve low qubit overhead. Here...