7–10 Oct 2025
Inn at Penn, University of Pennsylvania
US/Eastern timezone

A Smart Readout ASIC with Digital Signal Processing and Machine Learning Integrated into the Front-End

9 Oct 2025, 12:00
20m
Inn at Penn, University of Pennsylvania

Inn at Penn, University of Pennsylvania

3600 Sansom Street, Philadelphia, Pa 19104
Parallel session talk RDC 4 Readout & ASICs RDC 4 Readout & ASICs

Speaker

Prashansa Mukim (Brookhaven National Laboratory)

Description

The explosive growth in data rates being seen by next-generation detectors calls for transformative solutions that integrate intelligence at the edge. In this talk, we will present a smart readout application specific integrated circuit (ASIC) that incorporates advanced digital signal processing (DSP) and artificial neural networks (ANNs) directly into the detector front-end. By leveraging high-level synthesis for the DSP circuitry and custom RTL design for the ANNs, we co-optimize multi-layer perceptrons (MLPs) for regression and classification tasks, including amplitude estimation and pulse shape discrimination. A stochastic rounding technique ensures convergence of training with quantized weights, enabling deployment of compact AI models on-chip. This tight integration of DSP and machine learning in front-end electronics opens the door to real-time feature extraction and low-latency edge processing, leading to improved energy-efficiency and reduction in data transmission rates to further data acquisition systems.

Author

Prashansa Mukim (Brookhaven National Laboratory)

Co-authors

Dominik Gorni (Brookhaven National Laboratory) Grzegorz Deptuch (Brookhaven National Laboratory) Jack Fried (Brookhaven National Laboratory) Piotr Maj (Brookhaven National Laboratory) Shinjae Yoo (Brookhaven National Laboratory) Shubha Kharel Soumyajit Mandal (Brookhaven National Laboratory) Yihui Ren (Brookhaven National Laboratory)

Presentation materials

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