Speakers
Description
Being among the world’s leading heavy-ion scientific facilities, the heavy ion research facility in Lanzhou (HIRFL) and the high-intensity heavy-ion accelerator facility (HIAF) are constructed to study nuclear physics, atomic physics, nuclide chart, and heavy-ion-related applications. Some experiments under construction or planned at HIRFL and HIAF are the CSR external-target experiment (CEE), the high energy fragment separator (HFRS)， and the electron-ion collider in China (EICC). Time-of-flight (TOF) detectors are highly desirable, and many experiments have been performed at HIRFL and HIAF. TOF detectors play vital roles, such as particle identification and kinetic energy measurements, by measuring the time of flight of particles. TOF detectors require front-end electronics to realize approximately ten ps high-precision time resolution measurements. In this paper, a high-precision 64-channel leading-edge and trailing-edge time-to-digital converter (TDC) based on a field programmable gate array (FPGA) is designed. The TDC is implemented on Xilinx Kintex-7 XC7K325T-2FFG900I FPGA. The entire TDC consists of a coarse counter module to increase the measurement range, a multi-step fine time measurement counter module of the CARRY4 delay chain to improve resolution, a synchronizer module to match the coarse and fine counters, and a data transmission module to interact with the host computer. Rapid detection and control are achieved through the host computer software design. In the lab test results, the time resolution precision root mean square (RMS) is 7.78 ps, the average least significant bit (LSB) is 3.04 ps, and the dead time is 22.5 ns. The next step will be a joint test with a TOF detector, and further test results will be presented during the conference.
