2–4 Feb 2026
CIEMAT
Europe/Madrid timezone

Session

WG6 Electronics

3 Feb 2026, 11:30
Salón de Actos "Margarita Salas" (Edificio 1, Planta Baja) (CIEMAT)

Salón de Actos "Margarita Salas" (Edificio 1, Planta Baja)

CIEMAT

Avenida Complutense, 40 28040 Madrid Spain

Conveners

WG6 Electronics

  • Diego Real
  • Fernando Arteche (Instituto Tecnológico de Aragón)
  • Fernando Jose Arteche Gonzalez (Aragon Institute of Technology Itainnova (ES))
  • Santiago Folgueras (Universidad de Oviedo (ES))

Presentation materials

There are no materials yet.

  1. Diego Real, Fernando Arteche (Instituto Tecnológico de Aragón), Fernando Jose Arteche Gonzalez (Aragon Institute of Technology Itainnova (ES)), Santiago Folgueras (Universidad de Oviedo (ES))
    03/02/2026, 11:30
  2. Ignacio Redondo Fernandez (CIEMAT - Centro de Investigaciones Energéticas Medioambientales y Tec. (ES))
    03/02/2026, 11:45
    WG6 Electronics

    CIEMAT has lead the upgrade of the CMS DT electronics for HL-LHC upgrade, being in charge of fabricating both front end and backend electronics:

    1. The 180 OBDT-theta frontend boards host a Mircrosemi FPGA that can provide Multi-TDC (>200 channels) capability with a bin size requirement of <1 ns. They have been irradiated up to 100 Gy at the CHARM irradiation facility and...
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  3. Jorge Buces Sáez (IPARCOS-UCM), María Molina Delicado (IPARCOS - Universidad Complutense de Madrid)
    03/02/2026, 12:00
    WG6 Electronics

    The Cherenkov Telescope Array Observatory (CTAO) represents the next generation of ground-based gamma-ray telescopes, designed to probe the very-high-energy (VHE) sky above 20 GeV with unprecedented sensitivity. The northern array (CTAO-North) will be composed of an ensemble of Medium-Sized Telescopes (MSTs) and four Large-Sized Telescopes (LSTs), the latter designed to detect the...

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  4. Pelayo Leguina (Universidad de Oviedo)
    03/02/2026, 12:15
    WG6 Electronics

    Real-time track finding for displaced-muon signatures in the CMS Level-1 trigger must operate under strict fixed-latency constraints (12.5~$\mu$s) while processing high-throughput detector data. Graph neural networks (GNNs) provide a natural representation of sparse, irregular detector geometries; however, mapping message-passing models to FPGAs requires careful co-optimization of numerical...

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