19–23 Dec 2024
Swatantrata Bhavan, Banaras Hindu University, Varanasi
Asia/Kolkata timezone

Design, fabrication and characterization of a bias supply circuit for SiPMs

Not scheduled
20m
Swatantrata Bhavan, Banaras Hindu University, Varanasi

Swatantrata Bhavan, Banaras Hindu University, Varanasi

Department of Physics, I.Sc., Banaras Hindu University, 221005 Varanasi, India
Postar Future experiments and detector development

Speaker

Prajjalak Chattopadhyay (Tata Institute of Fundamental Research, Mumbai)

Description

To study the feasibility of a shallow-depth neutrino detector, a Cosmic Muon Veto Detector (CMVD) is being built around the RPC detector stack at TIFR, Mumbai. The CMVD will use extruded plastic scintillators for muon detection and wavelength-shifting fibers coupled with silicon photomultipliers (SiPMs) for signal readout. These SiPMs require a very accurate, precise, and stable power supply for stable gain characteristics. We developed a bias voltage supply circuit that is capable of supplying $18-68V$ in $50mV$ steps and up to about $4mA$ current. It features digital voltage adjustment and stabilization, as well as current monitoring capabilities using external controllers such as microcontrollers or FPGAs. In addition to providing better flexibility, the external controller enables possibilities like temperature compensation. Designed to power multiple SiPMs, this circuit can be easily integrated with the front-end electronics of SiPMs.

Author

Prajjalak Chattopadhyay (Tata Institute of Fundamental Research, Mumbai)

Co-authors

Gobinda Majumder (Tata Inst. of Fundamental Research (IN)) Mandar Saraf (Tata Institute of Fundamental Research) Mr Ravindra Raghunath Shinde (TATA INSTITUTE OF FUNDAMENTAL RESEARCH, MUMBAI) Satyanarayana Bheesette

Presentation materials