19–23 Dec 2024
Swatantrata Bhavan, Banaras Hindu University, Varanasi
Asia/Kolkata timezone

Advancing Low-Gain Avalanche Diodes (LGAD) into Ultra-fast Silicon Detectors for Future Nuclear and Particle Physics Experiments

Not scheduled
20m
Swatantrata Bhavan, Banaras Hindu University, Varanasi

Swatantrata Bhavan, Banaras Hindu University, Varanasi

Department of Physics, I.Sc., Banaras Hindu University, 221005 Varanasi, India
Oral Future experiments and detector development

Speaker

Mr Jaideep Kalani (Tata Inst. of Fundamental Research (IN))

Description

Future collider experiments require tracking detectors with better time and spatial resolution than current technologies. Low Gain Avalanche Diodes (LGADs) offer a viable solution, providing time resolution $<$ 20 ps and spatial resolution $\sim$ 50 $\mu$m using pixel segmentation. At HL-LHC, with an average of 1.6 collisions/mm, LGADs significantly improve fake jet rejection and jet-tagging efficiency. This study investigates the correlation of various detector designs and irradiation parameters with the signal output from LGAD electronics. Using the WeightField2 simulation package, we examine the impact of bias voltage, Gain Implant (G.I.) concentration, and sensor thickness on signal optimization, specifically for n-in-p monolithic LGADs with p-doped Si and SiC bulk. We determine the optimal sensor bulk width and compare results for both materials under HL-LHC conditions (-15$^\circ$C), accounting for radiation damage and lattice defects. Our findings identify LGAD designs with time resolution $\sim$ 20 ps and provide criteria for optimal signal output.

Field of contribution Experiment

Author

Mr Jaideep Kalani (Tata Inst. of Fundamental Research (IN))

Co-author

Prabhakar Palni (Tata Inst. of Fundamental Research (IN))

Presentation materials

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