Fermi National Accelerator Lab. (US)
Author in the following contributions
- A New Scheme of Redundant Timing Crosschecking for Frontend Systems
- A Low-Power Time-to-Digital Converter for the CMS Endcap Timing Layer (ETL) Upgrade
- The Analog Front-end for the LGAD Based Precision Timing Application in CMS ETL
- The threshold voltage generation for CMS ETL readout ASIC
- Short Course: Achieving High Performance Using Low Tech - Topics and Examples on FPGA and ASIC TDC
