Speaker
Description
Highly granular precision timing detectors are required to achieve scientific breakthroughs across HEP, NP, BES, and FES applications, and their critical need was highlighted by DOE BRN, European Strategy for Particle Physics, and Snowmass. To enable the development of these detectors, 3D-intgration between advanced sensor wafers and scaled CMOS technology nodes is required but is currently cost-prohibitive for use in scientific applications and experiments. Closing this technology gap is the main objective of the joint SLAC, FNAL and LLNL effort “3D Integrated Sensing Solutions”, supported by DOE’s Accelerated Innovation in Emerging Technologies grant. In collaboration with leading semiconductor industry partner, this effort is pursuing development of LGAD structures compatible with fabrication in commercial 12-inch wafer processes that can be cost-effectively 3D-integrated with readout ASICs. Both 12-inch wafer LGADs and two readout protype ASICs have been designed and fabricated.
This talk will present the design and characterization of the second ASIC: THRIGLAV (THRee-dimensional InteGrated LgAd driVer). THRIGLAV was fabricated in 28nm CMOS technology and consists of a 5mm^2 100 x 100-pixel matrix of 50 μm-pitch pixels with an analog front-end for LGAD readout and TDCs that provide time-of-arrival and time-over-threshold measurements with 6.25 ps and 50 ps resolutions, respectively. ASIC characterization confirms a sub-10 ps timing precision across the pixel matrix, excluding the analog front-end contribution, and a sub-13 ps precision for the entire chain. The achieved performance makes this by far the most advanced time-tagging pixelated detector front-end ASIC developed to date. THRIGLAV ASICs have been bump-bounded to 12-inch wafer LGADs and preliminary results of the system performance with laser will be shown.