Speaker
Description
Tracking detectors for future colliders demand low-mass pixel sensors that combine fine spatial resolution, low power consumption, and timing capability sufficient to reject beam-induced background. MAPS are well suited to these requirements, as they integrate the sensing volume and front-end electronics in a single CMOS process.
The NAPA program develops compact timing pixel front ends optimized for the low-power operation needed in large-area detectors. These developments are based on the TPSCo 65 nm technology. We present the first laboratory characterization of the NAPA-p2 prototype, including noise, threshold, and timing performance. We will discuss NAPA-p2 current performance and define operating points, area of improvements for the next design iteration, and upcoming developments.