Speaker
Description
Pixelated tracking detectors are integral to contemporary collider experiments. For forthcoming colliders, 4D pixel detectors that integrate high spatial resolution (<50 µm) and high temporal resolution (<30 ps) present a compelling solution to manage the extreme particle multiplicities prevalent in environments such as a Muon Collider. The 4D Fabric initiative is dedicated to the development of prototype pixel readout chips utilizing 28 nm CMOS technology to assess scalable, fault-tolerant digital architectures suitable for potential wafer-scale deployment. To establish this digital foundation and serve as a testing platform for thin-film sensors within the CMOS+X project, the initial prototype will prioritize architectural validation over high-precision timing integration. This presentation elucidates the current project progress, delineates the selection of specifications, and elucidates the translation of simulation insights into a robust digital architecture. It will also elucidate future R&D plans in relation to the current future collider landscape and how the 4D Fabric project will iterate towards the subsequent paradigm shift in Pixel detector technology.