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Description
The time-to-digital converter (TDC) is an essential instrument for achieving picosecond-level time resolution and finds widespread application in fields such as high-energy physics and time-of-flight positron emission tomography (TOF-PET). In this work, a TDC core, referred to as xpcTDC, is developed based on a circular-interpolation scheme. The TDC consists of four functional blocks: a controller, a pseudo-differential ring oscillator with quantizers, an encoder and event builder, and two serializers. It supports operation at three selectable reference clock frequencies—160 MHz, 80 MHz, and 40 MHz—each offering a distinct average event rate. Notably, at 160 MHz, a maximum event rate of 66 MHz is attained. The ring oscillator has 15 pseudo-differential delay cells of 30-ps cell delay, and uses a 5-stage resistive interpolation, thereby achieving a time resolution of approximately 6 ps. By carefully designing the resistance values, a uniform distribution of the interpolated delays is ensured. Following quantization of the TDC measurement results, the critical bubble issue is addressed in the encoder. The design is capable of accurately resolving bubbles with a depth of less than 10, a capability that has been verified through simulation. The two encoders provide the flexibility to selectively output either the encoded results alone or both the pre-encoded and encoded data in a synchronized manner. Finally, the chip was submitted for tape-out in April and is expected to begin testing in August, with experimental results anticipated thereafter.