Speaker
Description
This paper presents a monolithically integrated single-photon avalanche diode (SPAD) detector and its transimpedance amplifier (TIA) readout circuit, designed and fabricated in a SMIC 55 nm CMOS process. Two different SPAD structures are designed: a shallow-junction avalanche region structure (Structure I) and a deep-junction avalanche region structure (Structure II). Detectors of both structures are implemented in three configurations: single pixels, 3×3 arrays, and 5×10 arrays. The readout section integrates a TIA circuit with three adjustable gain levels. The feedback resistance can be set to 500 Ω, 3 kΩ, and 12 kΩ to accommodate varying gain requirements in different testing environments. The chip has completed fabrication and preliminary functional testing. Static I-V test results indicate that both structures exhibit SPAD avalanche breakdown characteristics, with the leakage current showing an increasing trend under illumination. The current evaluation focuses on the photon response of the 5×10 array of Structure I. When illuminated by a pulsed laser with a 625-nm wavelength, a 4-MHz frequency, and a 5-ns pulse width, the results show that the photon avalanche pulses amplified by the TIA synchronize with the external TTL trigger signal. These test data verify the physical feasibility of monolithically integrating SPAD arrays and TIA circuits at the 55 nm process node. This demonstrates the chip's capability to detect pulsed photon signals, providing a device foundation and data reference for the development of 4D tracking and photoelectric detection systems.