21st IEEE Real Time Conference - Colonial Williamsburg

Session

Large Experiments 4

12 Jun 2018, 09:10

Woodlands Conference Center

Conveners

Large Experiments 4

• Denis Calvet (CEA/IRFU, Centre de Saclay (FR))

576. PCIe Hot Plug support standardization challenges in ATCA

Miguel Correia (Instituto Superior Técnico, Universidade de Lisboa)

12/06/2018, 09:10

Oral presentation

Throughout the last decade, ATCA solidified its position as one of the main standards for advanced Physics instrumentation, in particular hard real-time control and data acquisition applications, using PCIe as the preferred communications protocol.
ATCA offers not only highly performant characteristics in data throughput, channel density or power supply/dissipation capabilities, but also...

569. Implementation of a High-Performance Pattern Recognition Associative Memory in an FPGA

Jamieson Olsen (Fermi National Accelerator Lab. (US))

12/06/2018, 09:30

Oral presentation

Pattern recognition associative memory (PRAM) devices are parallel processing engines which are used to tackle the complex combinatorics of track finding algorithms, particularly for silicon based tracking triggers. PRAM development has been mostly limited to the realm of ASICs, which often leads to lengthy and expensive design cycles. FPGAs allow for quick iterations, making them an ideal...

598. The WaveDAQ integrated Trigger and Data Acquisition System for the MEG II experiment

Marco Francesconi (University and INFN of Pisa)

12/06/2018, 09:50

Oral presentation

The MEG II experiment at Paul Scherrer Institut aims at a sensitivity improvement on $\mu^+\rightarrow e^+\gamma$ decay by an order of magnitude with respect to the former MEG experiment while keeping the same detection strategy. This is possible thanks to an higher segmentation of all detectors, which improves the resolutions and helps coping with twice muon stopping rate, mandatory to...

567. Pulsar3a: Next Generation ATCA Full Mesh General Purpose FPGA Based Processing Board

Jamieson Olsen (Fermi National Accelerator Lab. (US))

12/06/2018, 10:10

Oral presentation

In this talk we present the Pulsar3a, our next generation full mesh enabled FPGA-based ATCA processing board. Originally motivated by silicon-based tracking trigger needs for HL-LHC experiments, the Pulsar3a is designed with the goal of creating a scalable architecture abundant in flexible, non-blocking, high bandwidth interconnections. Based on Xilinx Ultrascale FPGAs, the Pulsar3a represents...