Speaker
Description
Clock synchronization procedures are mandatory in most physical experiments where event fragments are readout by spatially dislocated sensors and must be glued together to reconstruct the energy and interaction vertex information of incident particles. These distributed data readout topologies rely on an accurate time information available at the frontend, where raw data are acquired and tagged with a precise timestamp prior to data buffering and central data collecting. This makes the network complexity and latency, between frontend and backend electronics, negligible within upper bounds imposed by the frontend data buffer capability. The proposed research work describes an FPGA implementation of standard 1588 Precision Time Protocol (PTP) that exploits the CERN Timing, Trigger and Control (TTC) system as a local network multicast messaging media. The hardware implementation guarantees a clock synchronization beyond 4ns, overcoming the typical accuracy limitations inferred by computers Ethernet based Local Area Network (LAN). The validity of the proposed timing system has been proved in point-to-point data links as well as in star topology configurations over standard cat5e cables. In star topology configuration, in order to solve the marginal capturing phenomena, an hardware based finite state machine scans the bit period using a variable delay chain, and finds the optimal sampling point. The results achieved together with weaknesses and possible improvements are hereby detailed.
| Minioral | Yes |
|---|---|
| Description | Timing |
| Speaker | Davide Pedretti |
| Institute | INFN |
| Country | Italy |
