7–9 Apr 2025
Cavendish Laboratory, University of Cambridge
Europe/London timezone

Pixel Detector Development for Future Collider-Based Particle Physics Experiments

9 Apr 2025, 11:00
15m
Seminar East (A0.015E)

Seminar East (A0.015E)

Parallel talk Detectors and Instrumentation Detectors and Instrumentation

Speaker

Fuat Ustuner (The University of Edinburgh (GB))

Description

High-voltage CMOS (HV-CMOS) technology is one of the latest technologies used for tracking detectors. They provide cost-effective high radiation tolerance, fast charge collection and low power consumption. HV-CMOS is a full commercial process that is suitable for large-area applications. The integrated sensor and readout design also allow for much easier detector assembly, compared to the hybrid pixel detector technology. These advantages make them one of the promising solutions for particle tracking detector development in high-energy physics experiments.
ATLASPix3.1 chip is the first full reticle size monolithic HV-CMOS sensor including two shunt low-dropout (LDO) regulators. It comprises 132x372 pixels with a pitch of 50μm x 150μm, fabricated using TSI 180nm HV-CMOS technology. The shunt-LDO regulators enable chip operation via serial powering. Serial powering entails the usage of a single, constant current source to operate the chips in a chain. This structure is aimed at minimising power consumption, with a focus on efficiency and sustainability in electrical distribution materials.
The multi-chip quad module system, comprising four ATLASPix3.1 chips within a 4x4 cm2 area, facilitates shared powering and data transmission. Due to the multi-chip quad module structure, its integration of the serial powering schema, and the array of benefits it offers, these modules prove highly advantageous for large-scale applications.
This presentation will provide an overview of the preliminary results in the single ATLASPix3.1 chip characterisation on the serial powering approach, discuss developments and the changes in the new quad-module design and outline the prototyping multi-quad-module structures based on serial powering. Finally, the early-stage findings on the powering and readout studies of the multi-chip quad module will be presented.

Author

Fuat Ustuner (The University of Edinburgh (GB))

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