Speaker
Description
With the planned high-luminosity upgrade of the LHC increasing the number of simultaneous collisions per bunch crossing by at least a factor of four, the experiments at the LHC will need new handles to keep the trigger rate at manageable levels. To this end, the CMS detector plans to incorporate tracking information as part of its Level-1 trigger system for the phase 2 upgrade. We present here an all FPGA-based approach to track reconstruction which uses a road-search style track finding algorithm, combined with a Kalman Filter to select final track candidates and refine calculated track parameters. We first discuss the physics motivation for such a system and how it extends the physics reach of the CMS detector. We then give an overview of the algorithm and discuss how its implementation in Vivado's High Level Synthesis (HLS) language greatly simplifies the process of deploying the algorithm on FPGAs. We conclude by outlining the architecture of the full track-finding computing system and show how it is able to handle the high data throughput and fast triggering requirements of the HL-LHC runs.
