Speaker
Description
RadPix is a High-Voltage CMOS (HV-CMOS) pixel sensor developed collaboratively by the Large Hadron Collider Beauty (LHCb) experiment, and the DRD3 collaboration for Solid State Detector R&D. It represents the first monolithic pixel sensor capable of operating in the high radiation environment of the High Luminosity LHC. Building on the RD50-MPW chip series (led by Liverpool/UK) — established to push the limits of HV-CMOS technology — RadPix uniquely brings DRD3 developments to the application level. It is designed to address the requirements of both the LHCb Mighty-Tracker and Upstream trackers within a single sensor die, offering a strategic solution for the current financial climate.
RadPix1 is a small sensor chip prototype currently in development to meet LHCb requirements of good timing and spatial resolution, high data rate, and low power. Fabrication submission is planned for early 2026 as part of a DRD3-organized engineering run with LFoundry. As a UK-led initiative, RadPix is a leading candidate for deployment in LHCb Upgrade II.
This paper outlines the features of RadPix1, with particular emphasis on radiation hardness and serial powering capabilities—essential for physics performance. The digital design has been specifically tailored to interface with the experiment's electronics framework. An integrated, system-level approach is pursued for the end-to-end chain from sensor to backend DAQ. Extensive simulation and verification tools have been employed to mitigate risks prior to fabrication. Furthermore, the paper presents the roadmap for RadPix2, which builds from the testing outcomes of its predecessor. The active area will be scaled to full-size chip dimensions, and complete the feature set for full LHCb coverage.