Speaker
Description
Each High Energy Physics (HEP) experiment has its unique research motivation. The distinctive experimental goals further decides the various set of requirements and design criteria for the front end electronics (FEE) and data acquisition (DAQ) at the back-end. The main purpose of the DAQ is to receive the data with high reliability from the FEE near the HEP detector, and then transfer on to the back-end DAQ servers. With the recent advancements in silicon technology, the Field programmable gate array (FPGA) based DAQ provides the opportunity to implement the detector specific logic cores with reconfigurable architecture. For the long distance transmission of data from the FEE located near the detectors to the FPGA based DAQ located far away from the detectors, low voltage differential signals (LVDS) are preferred. We will present the design and development of the FPGA Mezzanine Card (FMC) based LVDS interface board that is capable to receive the data with high reliability from the detector FEE and pluggable directly on the FPGA cards for acquisition and processing. The card is designed to provide access to the LVDS pin pairs on the FPGA boards through the FMC connector. We will summarize the technical challenges for the development of such a FMC based interface card, points of uncertainties and their probable solutions. The use is not just restricted to particle physics; the customized design also fits well for industry applications like muon tomography, medical imaging and future HEP experiments.
| Session | Future Experiments and Detector Development |
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