Speaker
Description
Solid State Power Emulator Improvements for Power Device Evaluation
Richard Thomas
Army Research Laboratory RDRL-SED-P
Power Conditioning Branch
2800 Powder Mill Rd
Adelphi, MD 20783
Dr. Stephen Bayne
Texas Tech University
Department of Electrical & Computer Engineering Box 43102
Lubbock, TX 79409-3102
The advancement of silicon carbide (SiC) and gallium nitride (GaN) metal oxide semiconductor field effect transistors (MOSFETs) have led to lower switching and conduction losses in high power converters and inverters. Evaluation and characterization of these power MOSFET’s typically requires a costly test circuit comprised of large capacitances, power supplies and elaborate loads to provide and then dissipate the switched power before incorporating these experimental devices in a final circuit where other components of value may be exposed to extreme stresses. The Solid State Power Emulator (SSPE) is a system in which the device under test (DUT) is being exposed to the losses it would be subjected to in a continuous power system. The SSPE allows for evaluation of power devices without wasting the power that would be transferred through the DUT. The SSPE reduces the needed power capability of the supply and load by at least 80% and provides a significant reduction of the energy needed in the evaluation circuit capacitor. The SSPE capabilities will be demonstrated in the evaluation of the Cree third generation SiC MOSFET with a voltage and current rating of 1200V & 50A. The SSPE enables the device to operate in hard and soft cases at various switching frequencies. The power required to perform these types of evaluations with the SSPE and conventional evaluation circuits will be compared and discussed.
