3–7 Jun 2018
Jackson Lake Lodge
America/Denver timezone

Charge Plasma High Voltage PIN Diode Investigation

5 Jun 2018, 16:00
15m
Explorers Room

Explorers Room

Oral Presentation High Voltage Design, Devices, Testing, and Diagnostics Oral 7 - High Voltage Design

Speaker

Mrs Sara Hahmady

Description

PIN diodes are fabricated using high thermal budgets to form deep P+ anode and N+ cathode regions by either diffusion or ion-implantation. These doping methods come with significant difficulties the in fabrication process such as: doping fluctuation, doping activation and costly equipment. To overcome these issues related to fabrication and doping profile, a new approach called charge plasma (CP) has been developed to design and fabricate a device without involving any of these doping process. A high voltage (breakdown voltage 210 V) PIN diode has been designed and simulated using this concept which eliminates the restrictions noted. The charge plasma approach involves putting intrinsic silicon in contact with different metals. Due to the work function differences between metals and silicon electrons and holes will be induced in the intrinsic silicon. In the case of the PIN diode, the cathode metal electrode will have a work function (φm,C) less than silicon (φSi) and the anode metal electrode will have a work function (φm,A) greater than silicon (φSi), which create “n” and “p” regions respectively. These regions filled with electron and hole plasmas are similar to doped “n” (cathode) and “p” (anode) regions in conventional PIN diodes. Two-dimensional Silvaco Atlas device simulation has been used to evaluate the performance of a high voltage charge plasma PIN (CP-PIN) diode and compare its carrier concentration profile, forward and reverse characteristics, temperature dependency and switching properties with a conventional (doped) PIN diode of similar dimensions.

Author

Mrs Sara Hahmady

Co-authors

Prof. Mamidala Jagadesh Kumar Dr Richard Gale Dr stephen bayne

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