Speaker
Description
We develop 3D integrated Photon-to-Digital Converters (PDC) for photon counting applications needing sub-nanosecond timing resolution. These applications range from LIDAR and quantum communication to radiation instrumentation and medical imaging.
In previous years we reported on the architecture of the PDCs, on their fabrication process, and on two electronic readouts: one optimized for low power large area integration using TSMC 180nm CMOS; the other TSMC 65nm CMOS embedding Time-to-Digital Converters (TDC) and processing electronics optimized for time-of-flight applications.
Fabrication of the first 3 wafers of PDC with low power readout was completed at the Teledyne DALSA foundry in Oct. 2024. The SPAD show expected performances with peak sensitivity >50% at 420 nm and dark count rate (DCR) of $0.1~\text{cps}/\mu\text{m}^2$. Within a PDC, the DCR of the 4096 SPADs was characterized, showing 5% to 7% of screamer SPADs with >10$\times$ the average DCR.
We will report on the PDC fabrication, wafer characterization, and SPAD performance of the low-power version. We will also report on the TDC performances and their integration in the TSMC 65nm CMOS readout being designed.
| Keyword-1 | Single photon detectors |
|---|---|
| Keyword-2 | Radiation instrumentation |
| Keyword-3 | Semiconductor device |
