Speaker
Description
Summary (Max 500 words)
ATLAS innermost detector layer will undergo a broad range of upgrades for the HL-LHC phase. To be able to cope with the new detector design and a large set of modules to be integrated on the ITk, a demonstrator-based project at SR1 facility in CERN is conducted, to test and integrate a large number of Pixel modules equipped with RD53a electronics.
To mimic the ITk detector, a demonstrator project for the outer barrel section is ongoing with 34 modules. RD53a modules will encounter several production operation stages to be loaded on the OB demonstrator and finally integrated with real on-detector services for a full system test of multiple modules. Additionally, to monitor the module's performance from the reception stage to the final system test on the demonstrator, electrical scans ranging from the front-end readout chip to the sensor level are carried out, with an additional X-ray scan to find any open bumps at each production step. Furthermore, the module performance is compared at different production stages to allow a better understanding of any undesired trend of performance degradation.
A comprehensive study will be presented; tracking the main module performance features and applying a newly developed tool to identify, categorize and locate different Pixel defects, to allow a better understanding of any degradation foreseen in the large production phase for the ITk modules and define a detailed quality control (QC) scheme.
Besides, the anticipation of the overall testing stages will quantify the production yield based on module performance. Using the module QC tool, a combined analysis of the electrical scans for the Pixel detector circuit, starting from the digital front-end part towards the sensor is carried out. Indeed, if at any incidence a Pixel defect is found, it will get recorded by the tool and counted for the individual module and later for the total number of Pixel channels in the OB demonstrator project.
This approach is used to tackle the difficulties expected in modules and stave ratings once the ITk production starts. Hence, an envision of the most likely Pixel defects to occur is studied, based on classifying the origin of the Pixel defect failure with the QC tool. Moreover, to enable a deeper understanding of the expected difficulties, the 34 modules Pixel matrices are stacked to identify any specific geographical Pixel region containing any large number of Pixel defects.
In summary, this work is initiated to study in depth the Pixel quad module performance using RD53a front-end electronics, considering the implications of different testing stages during integration in the OB construction. The methodology applied here can be extended or adapted in the future, for the final module production to allow quick and systematic identification of defects in the module production and on-stave integration.
| Your name | Yahya Khwaira |
|---|---|
| Institute | IJC Lab - CNRS |
| Email address | khwaira@ijclab.in2p3.fr |
