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				(show_name no)
				(do_not_autoplace no)
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					(length 0)
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					(fill
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	(text "NOTE: These \"PWR_FLAG\" components\nare used to mark a net as a place where power \ncomes into the board (e.g. from an external\nconnector). This will quiet the ERC warnings\nabout things not being powered"
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		(uuid "1a20f6ea-179b-40cf-92b7-a4094cd7c3da")
	)
	(text "NOTE: Each block here is a \"sheet\"\n- you can right click and click \"enter sheet\"\nto see the components inside.\n\nWe keep the top level sheet just for connecting\nthe signals between sheets, and connectors off\nboard and the like.\n\nNormal schematic net labels do not \"travel\" outside\ntheir own sheet. This allows re-use of common names\nfor nets in different sheets. \n\nThere are three types of label that travel \"between\" sheets:\n\n1) hierarchical labels\n2) global labels\n3) power symbols (you can treat as implicit global label)\n\nThis is a type of schematic called \"hierarchical\ndesign\". Opinion is divided on whether it's\nbetter than \"flat\" design. \n\nPersonally I think it helps to keep the \noverall schematic well organised.\n\nIt is common nowadays not just in KiCad but\nother programs (e.g. Altium Designer) as well"
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